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 MCP2551
High-Speed CAN Transceiver
Features
* Supports 1 Mb/s operation * Implements ISO-11898 standard physical layer requirements * Suitable for 12V and 24V systems * Externally-controlled slope for reduced RFI emissions * Detection of ground fault (permanent dominant) on TXD input * Power-on reset and voltage brown-out protection * An unpowered node or brown-out event will not disturb the CAN bus * Low current standby operation * Protection against damage due to short-circuit conditions (positive or negative battery voltage) * Protection against high-voltage transients * Automatic thermal shutdown protection * Up to 112 nodes can be connected * High noise immunity due to differential bus implementation * Temperature ranges: - Industrial (I): -40C to +85C - Extended (E): -40C to +125C
Package Types
PDIP/SOIC
TXD VSS VDD RXD
1
8
RS CANH CANL VREF
MCP2551
VDD VSS
2 3 4
7 6 5
Block Diagram
VDD TXD Slope Control
TXD Dominant Detect
Thermal Shutdown
Driver Control Power-On Reset CANH 0.5 VDD GND Reference Voltage Receiver
RS
RXD VREF
CANL
(c) 2007 Microchip Technology Inc.
DS21667E-page 1
MCP2551
NOTES:
DS21667E-page 2
(c) 2007 Microchip Technology Inc.
MCP2551
1.0 DEVICE OVERVIEW
1.4 Operating Modes
The MCP2551 is a high-speed CAN, fault-tolerant device that serves as the interface between a CAN protocol controller and the physical bus. The MCP2551 provides differential transmit and receive capability for the CAN protocol controller and is fully compatible with the ISO-11898 standard, including 24V requirements. It will operate at speeds of up to 1 Mb/s. Typically, each node in a CAN system must have a device to convert the digital signals generated by a CAN controller to signals suitable for transmission over the bus cabling (differential output). It also provides a buffer between the CAN controller and the high-voltage spikes that can be generated on the CAN bus by outside sources (EMI, ESD, electrical transients, etc.). The RS pin allows three modes of operation to be selected: * High-Speed * Slope-Control * Standby These modes are summarized in Table 1-1. When in High-speed or Slope-control mode, the drivers for the CANH and CANL signals are internally regulated to provide controlled symmetry in order to minimize EMI emissions. Additionally, the slope of the signal transitions on CANH and CANL can be controlled with a resistor connected from pin 8 (RS) to ground, with the slope proportional to the current output at RS, further reducing EMI emissions.
1.1
Transmitter Function
The CAN bus has two states: Dominant and Recessive. A dominant state occurs when the differential voltage between CANH and CANL is greater than a defined voltage (e.g.,1.2V). A recessive state occurs when the differential voltage is less than a defined voltage (typically 0V). The dominant and recessive states correspond to the low and high state of the TXD input pin, respectively. However, a dominant state initiated by another CAN node will override a recessive state on the CAN bus.
1.4.1
HIGH-SPEED
High-speed mode is selected by connecting the RS pin to VSS. In this mode, the transmitter output drivers have fast output rise and fall times to support high-speed CAN bus rates.
1.4.2
SLOPE-CONTROL
1.1.1
MAXIMUM NUMBER OF NODES
The MCP2551 CAN outputs will drive a minimum load of 45, allowing a maximum of 112 nodes to be connected (given a minimum differential input resistance of 20 k and a nominal termination resistor value of 120).
Slope-control mode further reduces EMI by limiting the rise and fall times of CANH and CANL. The slope, or slew rate (SR), is controlled by connecting an external resistor (REXT) between RS and VOL (usually ground). The slope is proportional to the current output at the RS pin. Since the current is primarily determined by the slope-control resistance value REXT, a certain slew rate is achieved by applying a respective resistance. Figure 1-1 illustrates typical slew rate values as a function of the slope-control resistance value.
1.2
Receiver Function
1.4.3
STANDBY MODE
The RXD output pin reflects the differential bus voltage between CANH and CANL. The low and high states of the RXD output pin correspond to the dominant and recessive states of the CAN bus, respectively.
1.3
Internal Protection
CANH and CANL are protected against battery shortcircuits and electrical transients that can occur on the CAN bus. This feature prevents destruction of the transmitter output stage during such a fault condition. The device is further protected from excessive current loading by thermal shutdown circuitry that disables the output drivers when the junction temperature exceeds a nominal limit of 165C. All other parts of the chip remain operational and the chip temperature is lowered due to the decreased power dissipation in the transmitter outputs. This protection is essential to protect against bus line short-circuit-induced damage.
The device may be placed in standby or "SLEEP" mode by applying a high-level to RS. In SLEEP mode, the transmitter is switched off and the receiver operates at a lower current. The receive pin on the controller side (RXD) is still functional but will operate at a slower rate. The attached microcontroller can monitor RXD for CAN bus activity and place the transceiver into normal operation via the RS pin (at higher bus rates, the first CAN message may be lost).
(c) 2007 Microchip Technology Inc.
DS21667E-page 3
MCP2551
TABLE 1-1:
Mode Standby Slope-control High-speed
MODES OF OPERATION
Current at Rs Pin -IRS < 10 A 10 A < -IRS < 200 A -IRS < 610 A Resulting Voltage at RS Pin VRS > 0.75 VDD 0.4 VDD < VRS < 0.6 VDD 0 < VRS < 0.3VDD
TABLE 1-2:
VDD
TRANSCEIVER TRUTH TABLE
VRS VRS < 0.75 VDD TXD 0 1 or floating X 0 1 or floating X X CANH CANL Bus State( 1) RXD( 1) 0 1 1 0 1 1 X
HIGH LOW Dominant Not Driven Not Driven Recessive Not Driven Not Driven Recessive VRS > 0.75 VDD VRS < 0.75 VDD HIGH LOW Dominant VPOR < VDD < 4.5V (See Note 3) Not Driven Not Driven Recessive Not Driven Not Driven Recessive VRS > 0.75 VDD 0 < VDD < VPOR X Not Driven/ Not Driven/ High Impedance No Load No Load Note 1: If another bus node is transmitting a dominant bit on the CAN bus, then RXD is a logic `0'. 2: X = "don't care". 3: Device drivers will function, although outputs are not ensured to meet the ISO-11898 specification.
4.5V VDD 5.5V
FIGURE 1-1:
SLEW RATE VS. SLOPE-CONTROL RESISTANCE VALUE
25 20 Slew Rate V/uS 15 10 5 0 10 20 30 40 49 60 70 76 90 100 110 120 Resistance (k)
DS21667E-page 4
(c) 2007 Microchip Technology Inc.
MCP2551
1.5 TXD Permanent Dominant Detection
1.7.1 TRANSMITTER DATA INPUT (TXD)
TXD is a TTL-compatible input pin. The data on this pin is driven out on the CANH and CANL differential output pins. It is usually connected to the transmitter data output of the CAN controller device. When TXD is low, CANH and CANL are in the dominant state. When TXD is high, CANH and CANL are in the recessive state, provided that another CAN node is not driving the CAN bus with a dominant state. TXD has an internal pull-up resistor (nominal 25 k to VDD).
If the MCP2551 detects an extended low state on the TXD input, it will disable the CANH and CANL output drivers in order to prevent the corruption of data on the CAN bus. The drivers are disabled if TXD is low for more than 1.25 ms (minimum). This implies a maximum bit time of 62.5 s (16 kb/s bus rate), allowing up to 20 consecutive transmitted dominant bits during a multiple bit error and error frame scenario. The drivers remain disabled as long as TXD remains low. A rising edge on TXD will reset the timer logic and enable the CANH and CANL output drivers.
1.7.2
GROUND SUPPLY (VSS)
Ground supply pin.
1.6
Power-on Reset
1.7.3
SUPPLY VOLTAGE (VDD)
When the device is powered on, CANH and CANL remain in a high-impedance state until VDD reaches the voltage-level VPORH. In addition, CANH and CANL will remain in a high-impedance state if TXD is low when VDD reaches VPORH. CANH and CANL will become active only after TXD is asserted high. Once powered on, CANH and CANL will enter a high-impedance state if the voltage level at VDD falls below VPORL, providing voltage brown-out protection during normal operation.
Positive supply voltage pin.
1.7.4
RECEIVER DATA OUTPUT (RXD)
RXD is a CMOS-compatible output that drives high or low depending on the differential signals on the CANH and CANL pins and is usually connected to the receiver data input of the CAN controller device. RXD is high when the CAN bus is recessive and low in the dominant state.
1.7
Pin Descriptions
1.7.5
REFERENCE VOLTAGE (VREF)
Reference Voltage Output (Defined as VDD/2).
The 8-pin pinout is listed in Table 1-3.
1.7.6 TABLE 1-3:
Pin Number 1 2 3 4 5 6 7 8
CAN LOW (CANL)
MCP2551 PINOUT
Pin Name TXD VSS VDD RXD VREF CANL CANH RS Ground Supply Voltage Receive Data Output Reference Output Voltage CAN Low-Level Voltage I/O CAN High-Level Voltage I/O Slope-Control Input Pin Function Transmit Data Input
The CANL output drives the low side of the CAN differential bus. This pin is also tied internally to the receive input comparator.
1.7.7
CAN HIGH (CANH)
The CANH output drives the high-side of the CAN differential bus. This pin is also tied internally to the receive input comparator.
1.7.8
SLOPE RESISTOR INPUT (RS)
The RS pin is used to select High-speed, Slope-control or Standby modes via an external biasing resistor.
(c) 2007 Microchip Technology Inc.
DS21667E-page 5
MCP2551
NOTES:
DS21667E-page 6
(c) 2007 Microchip Technology Inc.
MCP2551
2.0
2.1
ELECTRICAL CHARACTERISTICS
Terms and Definitions
2.1.5
DIFFERENTIAL VOLTAGE, VDIFF (OF CAN BUS)
Differential voltage of the two-wire CAN bus, value VDIFF = VCANH - VCANL.
A number of terms are defined in ISO-11898 that are used to describe the electrical characteristics of a CAN transceiver device. These terms and definitions are summarized in this section.
2.1.6
INTERNAL CAPACITANCE, CIN (OF A CAN NODE)
2.1.1
BUS VOLTAGE
Capacitance seen between CANL (or CANH) and ground during the recessive state when the CAN node is disconnected from the bus (see Figure 2-1).
VCANL and VCANH denote the voltages of the bus line wires CANL and CANH relative to ground of each individual CAN node.
2.1.7
INTERNAL RESISTANCE, RIN (OF A CAN NODE)
2.1.2
COMMON MODE BUS VOLTAGE RANGE
Resistance seen between CANL (or CANH) and ground during the recessive state when the CAN node is disconnected from the bus (see Figure 2-1).
Boundary voltage levels of VCANL and VCANH with respect to ground, for which proper operation will occur, if up to the maximum number of CAN nodes are connected to the bus.
FIGURE 2-1:
PHYSICAL LAYER DEFINITIONS
ECU
2.1.3
DIFFERENTIAL INTERNAL CAPACITANCE, CDIFF (OF A CAN NODE)
RIN CANL RIN RDIFF CIN CIN GROUND CDIFF CANH
Capacitance seen between CANL and CANH during the recessive state when the CAN node is disconnected from the bus (see Figure 2-1).
2.1.4
DIFFERENTIAL INTERNAL RESISTANCE, RDIFF (OF A CAN NODE)
Resistance seen between CANL and CANH during the recessive state when the CAN node is disconnected from the bus (see Figure 2-1).
(c) 2007 Microchip Technology Inc.
DS21667E-page 7
MCP2551
Absolute Maximum Ratings
VDD.............................................................................................................................................................................7.0V DC Voltage at TXD, RXD, VREF and VS ............................................................................................ -0.3V to VDD + 0.3V DC Voltage at CANH, CANL (Note 1) .......................................................................................................... -42V to +42V Transient Voltage on Pins 6 and 7 (Note 2) ............................................................................................. -250V to +250V Storage temperature ...............................................................................................................................-55C to +150C Operating ambient temperature ..............................................................................................................-40C to +125C Virtual Junction Temperature, TVJ (Note 3).............................................................................................-40C to +150C Soldering temperature of leads (10 seconds) .......................................................................................................+300C ESD protection on CANH and CANL pins (Note 4) ...................................................................................................6 kV ESD protection on all other pins (Note 4) ..................................................................................................................4 kV Note 1: Short-circuit applied when TXD is high and low. 2: In accordance with ISO-7637. 3: In accordance with IEC 60747-1. 4: Classification A: Human Body Model. NOTICE: Stresses above those listed under "Maximum ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
DS21667E-page 8
(c) 2007 Microchip Technology Inc.
MCP2551
2.2 DC Characteristics
Electrical Characteristics: Industrial (I): TAMB = -40C to +85C VDD = 4.5V to 5.5V Extended (E):TAMB = -40C to +125C VDD = 4.5V to 5.5V Characteristic Min Max Units Conditions
DC Specifications Param No. Supply D1 D2 D3 IDD Supply Current
Sym
-- -- -- --
75 10 365 465 4.3 4.0 0.8
mA mA A A V V V
Dominant; VTXD = 0.8V; VDD Recessive; VTXD = +2V; RS = 47 k -40C TAMB +85C, Standby; (Note 2) -40C TAMB +125C, Standby; (Note 2) CANH, CANL outputs are active when VDD > VPORH CANH, CANL outputs are not active when VDD < VPORL Note 1
D4 D5 D6
VPORH VPORL VPORD
High-level of the power-on reset comparator Low-level of the power-on reset comparator Hysteresis of power-on reset comparator
3.8 3.4 0.3
Bus Line (CANH; CANL) Transmitter D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 IO(SC)(CANL)l VDIFF(r)(i) CANL short-circuit output current Recessive differential input voltage VO(CANH) VO(CANL) VDIFF(r)(o) VDIFF(d)(o) IO(SC)(CANH) CANH dominant output voltage CANL dominant output voltage Recessive differential output voltage Dominant differential output voltage CANH short-circuit output current VCANH(r);VCANL(r) CANH, CANL Recessive bus voltage IO(CANH)(reces) IO(CANL)(reces) Recessive output current 2.0 -2 -10 2.75 0.5 -500 1.5 -- -- -- -1.0 -1.0 D18 VDIFF(d)(i) Dominant differential input voltage 0.9 1.0 D19 D20 D21 VDIFF(h)(i) RIN RIN(d) Differential input hysteresis CANH, CANL common-mode input resistance Deviation between CANH and CANL common-mode input resistance 100 5 -3 3.0 +2 +10 4.5 2.25 +50 3.0 -200 -100 (typical) 200 +0.5 +0.4 5.0 5.0 200 50 +3 V mA mA V V mV V mA mA mA V V V V mV k % VCANH = VCANL VTXD = VDD; no load. -2V < V(CAHL,CANH) < +7V, 0V Bus Line (CANH; CANL) Receiver: [TXD = 2V; pins 6 and 7 externally driven]
Note 1: 2: 3:
This parameter is periodically sampled and not 100% tested. ITXD = IRXD = IVREF = 0 mA; 0V < VCANL < VDD; 0V < VCANH < VDD; VRS = VDD. This is valid for the receiver in all modes; High-speed, Slope-control and Standby.
(c) 2007 Microchip Technology Inc.
DS21667E-page 9
MCP2551
2.2 DC Characteristics (Continued)
Electrical Characteristics: Industrial (I): TAMB = -40C to +85C VDD = 4.5V to 5.5V Extended (E):TAMB = -40C to +125C VDD = 4.5V to 5.5V Characteristic Min Max Units Conditions
DC Specifications (Continued) Param No.
Sym
Bus Line (CANH; CANL) Receiver: [TXD = 2V; pins 6 and 7 externally driven] D22 D24 RDIFF ILI Differential input resistance CANH, CANL input leakage current High-level input voltage Low-level input voltage High-level input current Low-level input current High-level output voltage Low-level output voltage Reference output voltage Input voltage for standby mode Slope-control mode current Slope-control mode voltage Shutdown junction temperature Shutdown temperature hysteresis 20 -- 100 150 k A VDD < VPOR; VCANH = VCANL = +5V Output recessive Output dominant VTXD = VDD VTXD = 0V IOH = 8 mA IOL = 8 mA -50 A < IVREF < 50 A
Transmitter Data Input (TXD) D25 D26 D27 D28 D31 D32 D33 D34 D35 D36 D37 D38 Note 1: 2: 3: VIH VIL IIH IIL VOH VOL VREF VSTB ISLOPE VSLOPE TJ(sd) TJ(h) 2.0 VSS -1 -100 0.7 VDD -- 0.45 VDD 0.75 VDD -10 0.4 VDD 155 20 VDD +0.8 +1 -400 -- 0.8 0.55 VDD -- -200 0.6 VDD 180 30 V V A A V V V V A V
o o
Receiver Data Output (RXD)
Voltage Reference Output (VREF) Standby/Slope-Control (RS pin)
Thermal Shutdown C C Note 1 -12V < V(CANL, CANH) < +12V (Note 3)
This parameter is periodically sampled and not 100% tested. ITXD = IRXD = IVREF = 0 mA; 0V < VCANL < VDD; 0V < VCANH < VDD; VRS = VDD. This is valid for the receiver in all modes; High-speed, Slope-control and Standby.
FIGURE 2-1:
TEST CIRCUIT FOR ELECTRICAL CHARACTERISTICS
VDD TXD VREF RXD 30 pF CANL GND RS Rext CAN Transceiver CANH 60 100 pF 0.1F
Note:
RS may be connected to VDD or GND via a load resistor depending on desired operating mode as described in Section 1.7.8, "Slope Resistor Input (Rs)".
DS21667E-page 10
(c) 2007 Microchip Technology Inc.
MCP2551
FIGURE 2-2: TEST CIRCUIT FOR AUTOMOTIVE TRANSIENTS
TXD VREF RXD CANL GND RS Rext
Note: RS may be connected to VDD or GND via a load resistor depending on desired operating mode as described in Section 1.7.8, "Slope Resistor Input (Rs)"
CANH CAN Transceiver
500 pF Schaffner Generator
60
500 pF
The wave forms of the applied transients shall be in accordance with "ISO-7637, Part 1", test pulses 1, 2, 3a and 3b.
FIGURE 2-3:
HYSTERESIS OF THE RECEIVER
RXD (receive data output voltage) VDIFF (r)(i) VDIFF (d)(i)
VOH
VOL hysteresis D19
0.5 Vdiff (V)
0.9
(c) 2007 Microchip Technology Inc.
DS21667E-page 11
MCP2551
2.3 AC Characteristics
Electrical Characteristics: Industrial (I): TAMB = -40C to +85C VDD = 4.5V to 5.5V Extended (E): TAMB = -40C to +125C VDD = 4.5V to 5.5V Characteristic Bit time Bit frequency Delay TXD to bus active Delay TXD to bus inactive Min 1 16 -- -- -- 5 TtxL2rx(d) Delay TXD to receive active -- -- 6 TtxH2rx(r) Delay TXD to receiver inactive -- -- -- -- 7 10 11 12 13 14 15 SR tWAKE TbusD2rx(s) CIN(CANH) CIN(CANL) CDIFF TtxL2busZ CANH, CANL slew rate Wake-up time from standby (Rs pin) Bus dominant to RXD Low (Standby mode) CANH; CANL input capacitance Differential input capacitance TX Permanent Dominant Timer Disable Time 5.5 -- -- -- -- 1.25 -- Max 62.5 1000 70 125 170 130 250 175 225 235 400 8.5 5 550 20 (typical) 10 (typical) 4 1 Units s kHz ns ns ns ns ns ns ns ns ns V/s s ns pF pF ms s Rising edge on TXD while device is in permanent dominant state Conditions VRS = 0V VRS = 0V -40C TAMB +125C, VRS = 0V -40C TAMB +85C, VRS = 0V -40C TAMB +125C, VRS = 0V -40C TAMB +125C, VRS = 0V -40C TAMB +125C, RS = 47 k -40C TAMB +85C, VRS = 0V -40C TAMB +85C, RS = 47 k -40C TAMB +125C, VRS = 0V -40C TAMB +125C, RS = 47 k Refer to Figure 1-1; RS = 47 k, (Note 1) see Figure 2-5 VRS = +4V; (see Figure 2-2) 1 Mbit/s data rate; VTXD = VDD, (Note 1) 1 Mbit/s data rate (Note 1)
AC Specifications Param No. 1 2 3 4
Sym tBIT fBIT TtxL2bus(d) TtxH2bus(r)
TtxR2pdt(res) TX Permanent Dominant Timer Reset Time
Note 1: This parameter is periodically sampled and not 100% tested.
DS21667E-page 12
(c) 2007 Microchip Technology Inc.
MCP2551
2.4 Timing Diagrams and Specifications
TIMING DIAGRAM FOR AC CHARACTERISTICS FIGURE 2-4:
TXD (transmit data input voltage)
VDD 0V
VDIFF (CANH, CANL differential voltage) RXD (receive data output voltage)
0.9V
0.5V
3 5
0.3 VDD 4 6
0.7 VDD
FIGURE 2-5:
TIMING DIAGRAM FOR WAKE-UP FROM STANDBY
VDD 0.6 VDD 0V
VRS Slope resistor input voltage
VRXD Receive data output voltage 0.3 VDD
10 VTXD = 0.8V
FIGURE 2-2:
TIMING DIAGRAM FOR BUS DOMINANT TO RXD LOW (STANDBY MODE)
1.5V
VDIFF, Differential voltage
0.9V 0V
Receive data output voltage 0.3 VDD
11 VRS = 4V; VTXD = 2V
(c) 2007 Microchip Technology Inc.
DS21667E-page 13
MCP2551
NOTES:
DS21667E-page 14
(c) 2007 Microchip Technology Inc.
MCP2551
3.0
3.1
PACKAGING INFORMATION
Package Marking Information
8-Lead PDIP (300 mil) Example:
XXXXXXXX XXXXXNNN YYWW
MCP2551 I/P256 e3 0726
8-Lead SOIC (150 mil)
Example:
XXXXXXXX XXXXYYWW NNN
MCP2551 e3 I/SN0726 256
Legend: XX...X Y YY WW NNN
Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package.
e3
* Note:
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
(c) 2007 Microchip Technology Inc.
DS21667E-page 15
MCP2551
8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
N
NOTE 1 E1
1
2 D
3 E A2
A
A1 e b1 b
L
c
eB
Units Dimension Limits Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing N e A A2 A1 E E1 D L c b1 b eB - .115 .015 .290 .240 .348 .115 .008 .040 .014 - MIN
INCHES NOM 8 .100 BSC - .130 - .310 .250 .365 .130 .010 .060 .018 - .210 .195 - .325 .280 .400 .150 .015 .070 .022 MAX
.430 Notes: 1. Pin 1 visual index feature may vary, but must be located with the hatched area. 2. Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-018B
DS21667E-page 16
(c) 2007 Microchip Technology Inc.
MCP2551
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
D e N
E E1
NOTE 1 1 2 3 b h c h
A
A2
A1
L L1
Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer (optional) Foot Length Footprint Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom N e A A2 A1 E E1 D h L L1 c b 0 0.17 0.31 5 5 0.25 0.40 - 1.25 0.10 MIN
MILLMETERS NOM 8 1.27 BSC - - - 6.00 BSC 3.90 BSC 4.90 BSC - - 1.04 REF - - - - - 8 0.25 0.51 15 0.50 1.27 1.75 - 0.25 MAX
15 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-057B
(c) 2007 Microchip Technology Inc.
DS21667E-page 17
MCP2551
NOTES:
DS21667E-page 18
(c) 2007 Microchip Technology Inc.
MCP2551
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range /XX Package Examples:
a) b) c) d) MCP2551-I/P: MCP2551-E/P: MCP2551-I/SN: MCP2551T-I/SN: Industrial temperature, PDIP package. Extended temperature, PDIP package. Industrial temperature, SOIC package. Tape and Reel, Industrial Temperature, SOIC package.
Device: Temperature Range: Package:
MCP2551= High-Speed CAN Transceiver I E P SN = = = = -40C to +85C -40C to +125C
e)
Plastic DIP (300 mil Body) 8-lead Plastic SOIC (150 mil Body) 8-lead
MCP2551T-E/SN: Tape and Reel, Extended Temperature, SOIC package.
(c) 2007 Microchip Technology Inc.
DS21667E-page 19
MCP2551
NOTES:
DS21667E-page 20
(c) 2007 Microchip Technology Inc.
MCP2551
APPENDIX A: REVISION HISTORY
Revision E (January 2007) This revision includes updates to the packaging diagrams.
(c) 2007 Microchip Technology Inc.
DS21667E-page 21
NOTES:
DS21667E-page 22
(c) 2007 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, Mindi, MiWi, MPASM, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
(c) 2007 Microchip Technology Inc.
DS21667E-page 23
WORLDWIDE SALES AND SERVICE
AMERICAS
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ASIA/PACIFIC
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EUROPE
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12/08/06
DS21667E-page 24
(c) 2007 Microchip Technology Inc.


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